EEE40002: Integrated Circuit Design Assignment, SUT, Malaysia Ability to evaluate the CMOS transistor characteristics and Conduct investigations of complex problems using research-based knowledge
University | Swinburne University of Technology (SUT) |
Subject | EEE40002: Integrated Circuit Design |
This assignment covers:
Ability to evaluate the CMOS transistor characteristics. Conduct investigations of complex problems using research-based knowledge (WK8) and research methods including design of experiments, analysis, interpretation of data, and synthesis of the information to provide valid conclusions.
Figure 1 shows the overall process flow of an Integrated Circuit (IC) design.
SULIT
The operation begins with Front End Phase by creating the transistor-level schematic design based on the design specifications, before proceeding with the simulation step. In this simulation step, the test benches are required to verify the functionality of the design.
Next, the operation continues with Back End Phase by designing the layout based on the schematic design. Several steps are involved in this layout design phase such as Pre-layout design which includes Placement and Routing steps. Layout designers can always try different device placements and examine
the impact of any specific configuration of device placement on the original specification. Then, the process continues with DRC (Design Rule Check) and LVS (Layout Versus Schematic) steps. A successful DRC ensures that the layout conforms to the rules designed for faultless fabrication, while the successful LVS ensures that the layout connectivity of the physical design matches the schematic design.
Students in NMJ216043 was exposed to all the design process mentioned earlier. However, to achieve a successful post-layout design that meets all the specifications, important tasks like parasitic extraction is required. Students should be aware that the behavior of the layout design is extremely sensitive to the layout-induced parasitics such as inductance, resistance, and capacitance. Parasitics not only influence the layout performance but often render it non-functional. Hence, it is essential to consider the effect of parasitics in the design process. In conclusion, the major purpose of parasitic extraction is to create an accurate layout of a circuit, so that the simulations can emulate the actual circuit responses.
Stuck in Completing this Assignment and feeling stressed ? Take our Private Writing Services.
Get Help By Expert
Experience top-notch assistance for your Integrated Circuit Design assignment at Swinburne University of Technology. Explore Assignment Helper My, your dedicated partner for academic success. Our Malaysia-based online assignment helpers bring comprehensive insights and guidance to ensure your project's excellence. You also acquire our professionals for the best Online Exam Help.
Recent Solved Questions
- Service Marketing Assignment, SU, Malaysia To become more aware of critical aspects of the service encounter from a customer’s perspective
- Strategic Management Assignment, ASB, Malaysia You are required to introduce your selected automobile company and highlight the key issues that the company is currently facing
- Business Strategy and Leadership Essay, HWU, Malaysia Identify one business organization- IJM Corporation Berhad. Use SWOT analysis to identify which leadership
- Finance Accounting and Management Report, UON, Malaysia You have been hired as a management consultant to analyze the current financial position of the company
- ACC30305: Principles of Accounting Assignment, TU, Malaysia Mr Peter, a sole trader, started his frozen food business on 1st January 2021 under the name of Peter Frozen Enterprise
- DATA ANALYSIS Assignment, TU, Malaysia Develop RQ, RO, Hypothesis and Framework Data screening and data coding in excel and then SPSS based on the questionnaire given
- MNE60303: Part A: Lesson Plan for Classroom Teaching (Theory Course): Instructional Design for Classroom and Clinical Teaching Individual Assignment, Malaysia
- Project Cost Auditing Assignment, UITM, Malaysia Discuss an issue/ problem/ process improvement that occurs in the current construction project
- EDC3164: Imagine you are a researcher in your chosen field of study. Your task is to develop a comprehensive: Research Project, SU, Malaysia
- BIS3043: Critical Appreciation of Drama Assignment, UPSI, Malaysia Explain two of the character flaws of Oedipus and Explain whether Oedipus is trapped by the fate designed